Contents
Monthly Quote
About Earl
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My name is Earl Killian. This is my personal web
page. I like to read (history, politics, fiction,
science, science fiction), and these pages contain
pointers to a few books I recommend and pointers to
interesting things on the web. I like to muse on the
way things should be and these pages include some of
my thoughts and ideas. I am vegan and a supporter of
animal rights, and these pages include a few quotes
and pointers on these subjects. I have a strong
interest in technology and public policy that will
eliminate the world’s greenhouse pollution. I have three
battery-only powered electric vehicles (a
Nissan Leaf, a
and a
Tesla Model S 85, and a
Tesla Model S 75D,
and these pages have some EV analysis.
(Sadly, I no longer have the Solectria Force.)
I do not currently have a fossil car.
I once built a solar (passive solar heating plus
PV),
straw bale home, but I no longer live there. I currently live
in Los Altos.
My current home has three solar systems (PV, domestic hot water,
and pool) and a heating/cooling retrofit. Finally, my politics,
values, and essays here reflect my interest and appreciation for
non-violence and pacifism.
The opinions expressed herein are my own and do not reflect upon
any organization, despite any association I might have.
Monthly Quote
Quote for April:
We investigated the differential diffusion of all of
the verified true and false news stories distributed
on Twitter from 2006 to 2017. The data comprise
~126,000 stories tweeted by ~3 million people more
than 4.5 million times. We classified news as true or
false using information from six independent
fact-checking organizations that exhibited 95 to 98%
agreement on the classifications. Falsehood diffused
significantly farther, faster, deeper, and more
broadly than the truth in all categories of
information, and the effects were more pronounced for
false political news than for false news about
terrorism, natural disasters, science, urban legends,
or financial information. We found that false news
was more novel than true news, which suggests that
people were more likely to share novel information.
Whereas false stories inspired fear, disgust, and
surprise in replies, true stories inspired
anticipation, sadness, joy, and trust. Contrary to
conventional wisdom, robots accelerated the spread of
true and false news at the same rate, implying that
false news spreads more than the truth because humans,
not robots, are more likely to spread it.
— Soroush Vosoughi et al., The spread of true and false news online
About Earl
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Contact information
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Off-site pages of mine
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My collections
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My writings
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Personal stuff
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Major programs that I’ve authored or worked on
- Pixie, predecessor Moxie, and successor Mixie, and associated tools
pixstats, moxstats, and mixstats
- MIPS u-code compiler procedure integrater
- MIPS u-code compiler code generator (co-author John Ho)
- Pastel — an off-color language and Pascal compiler (primary author Jeff Broughton)
- Amber — an operating system for the LLNL S1 project (many authors)
- Praxis — language definition and implementation (with Bob Morgan and Art Evans)
- BBN Satellite IMP (minor role)
- ITS Emacs (the original, in TECO) — a 1% contributor
(primary author Richard M. Stallman)
- CRTSTY
- Trantor — Communications operating system
(with Charles Frankston and Eugene Ciccarelli
for Steve Orszag)
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Instruction Set Architectures or extensions on which I’ve worked
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S-2: a RISC-like successor to the LLNL S-1
(circa 1984-1985)
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MIPS III: the 64-bit extension of the MIPS II ISA
(circa 1987-1991)
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MIPS V: the SIMD media extension
(circa 1996, primary work done by others)
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MIPS MDMX: the SIMD DSP/media-processing extension
(circa 1996, primary work done by others)
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MIPS16: the LSI Logic compact code ISA
(circa 1996, primary work done by LSI)
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Tensilica Xtensa: compact embedded ISA designed for
configurability and extensibility
(circa 1998)
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Tensilica Vectra I ISA and prototype (configurable SIMD,
non-VLIW media/DSP extensions)
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Tensilica Vectra II ISA (configurable SIMD, VLIW media/DSP
extensions)
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Tensilica Bitstream coprocessor ISA and implementation
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Tensilica Galois Field coprocessor ISA and implementation
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Processor micro-architectures that I helped to design
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LLNL S-2 (simple RISC-like pipelined ECL processor)
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MIPS R3000 (cache improvements of the R2000)
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MIPS R4000 (superscalar)
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QED R4600/R4700 (low-cost, low-power)
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Tensilica Xtensa (configurability, extensibility)
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My old email addresses
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MIT
- EAK@ML (also EAK@MIT-ML, EAK@MIT-ML.ARPA)
- EAK@AI (also EAK@MIT-AI, EAK@MIT-AI.ARPA)
- EAK@MC (also EAK@MIT-MC, EAK@MIT-MC.ARPA)
- and probably EKillian@MIT-Multics
- BBN: EKILLIAN@BBN-TENEXE (or EKILLIAN@BBNE)
- LLNL: eak@mordor.s1.gov, eak@s1-c.arpa
- MIPS: earl@mips.com
- QED: earl@qedinc.com
- SGI: earl@sgi.com
- Tensilica: earl@tensilica.com
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NIC Handles (e.g. whois -h whois.networksolutions.com
or www.networksolutions.com/en_US/whois/)
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ARIN Handles (e.g. whois -h whois.arin.net or ws.arin.net/cgi-bin/whois.pl)
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My U.S. Patents
- 5,027,270 — Instruction streaming FPO
- 5,398,328 — Software endian switching FPO
- 5,420,992 — Address and word ISA extension FPO
- 5,479,630 — Hybrid virtual/physical cache FPO
- 5,568,630 — Extended word size and address space FPO
- 5,572,713 — Reverse Endian FPO
- 5,574,877 — TLB with two physical pages per virtual tag FPO
- 5,696,958 — Method and apparatus for reducing delays following the execution of a branch instruction in an instruction pipeline FPO
- 5,864,703 — Method for providing extended precision in SIMD vector arithmetic operations FPO
- 5,933,650 — Alignment and ordering of vector elements for single instruction multiple data processing FPO
- 6,092,187 — Instruction prediction based on filtering FPO
- 6,266,758 — Alignment and ordering of vector elements for single instruction multiple data processing FPO
- 6,282,633 — High data density RISC processor FPO
- 6,425,076 — Instruction prediction based on filtering FPO
- 6,477,683 — Automated processor generation system for designing a configurable processor and method for the same FPO
- 6,477,697 — Adding complex instructions extensions to a microprocessor FPO
- 6,760,888 — Automated processor generation system for designing a configurable processor and method for the same FPO
- 6,854,046 — Configurable memory management unit FPO
- 7,020,854 — Automated processor generation system for designing a configurable processor and method for the same FPO
- 7,036,106 — Automated processor generation system for designing a configurable processor and method for the same FPO
- 7,159,100 — Method for providing extended precision in SIMD vector arithmetic operations FPO
- 7,197,625 — Alignment and ordering of vector elements for single instruction multiple data processing FPO
- 7,219,212 — Load/store operation of memory misaligned vector data using alignment register storing realigned data portion for combining with remaining portion FPO
- 7,346,881 — Method and apparatus for adding advanced instructions in an extensible processor architecture FPO
- 7,376,812 — Full-Text Vector co-processor for configurable and extensible processor architecture FPO
- 7,437,700 — Automated Processor Generation System and Method for Designing a Configurable Processor Delphion
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Programming languages that I contributed to in
design discussions
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Network protocols that I helped define long long ago
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