Earl Killian’s Web Page

My name is Earl Killian. This is my personal web page. I like to read (history, politics, fiction, science, science fiction), and these pages contain pointers to a few books I recommend and pointers to interesting things on the web. I like to muse on the way things should be and these pages include some of my thoughts and ideas. I am vegan and a supporter of animal rights, and these pages include a few quotes and pointers on these subjects. I have a strong interest in technology and public policy that will eliminate the world’s greenhouse pollution. I have three battery-only powered electric vehicles (a Nissan Leaf, a and a Tesla Model S 85, and a Solectria Force), and these pages have some EV analysis. I do not currently have a fossil car. I once built a solar (passive solar heating plus PV), straw bale home, but I no longer live there. I currently live in Los Altos. My current home has three solar systems (PV, domestic hot water, and pool) and a heating/cooling retrofit. Finally, my politics, values, and essays here reflect my interest and appreciation for non-violence and pacifism.

The opinions expressed herein are my own and do not reflect upon any organization, despite any association I might have.

Monthly Quote

Quote for July:

Growth for the sake of growth is the ideology of the cancer cell.

— Edward Abbey, The Journey Home: Some Words in the Defense of the American West, p. 183

About Earl

• Contact information
  • Addresses, phone numbers, PGP key, etc.
    (for friends only—password protected)
  • My old resume (PDF: 4KB)
    (for friends only—password protected)
    (but I am not looking for employment at this time)
• Off-site pages of mine
  • Earl Killian on Ello
  • Earl Killian on LinkedIn
  • Earl Killian on Twitter
  • Earl Killian on goodreads
  • Earl Killian on Yelp
  • Earl Killian on Facebook (deprecated)
  • Earl Killian on Google+ (deprecated)
• My collections
  • Collected Quotes
  • Past Quotes of the Month
  • Best of rec.food.veg, IMHO
  • Covered passages of Paris walk
  • Mathematical Formulas (use Mozilla to display MathML, explorer isn’t up to it)
  • Links to original publications in science and mathematics (very small right now)
  • My web links (bookmarks, old)
  • Software for download
    • Source code tarballs
      • Speedup of Berkeley MPEG player
    • Perl programs and modules
    • Emacs code
  • Recommended reading — My Favorite Books
    • Non-Fiction
    • Fiction
  • My Icon collection (approximately 400K download)
• My writings
  • Recent publications
    • Improving Instruction Delivery with a Block-Aware ISA
      (I didn’t write the paper, but I suggested the research, so I got listed as an author.)
  • Occasional Commentary (last updated 19 October 2015)
  • U.S. Political Glossary (non-conventional)
  • Aphorisms and Short Thoughts
  • My recipe for how to change things (politics etc.)
  • My notes on U.S. Presidents (the good, the bad, and the ugly)
  • My notes on U.S. Supreme Court decisions (the good, the bad, and the ugly)
  • Why I am vegan
  • SF story backdrops
• Personal stuff
  • Reading queue
  • Recently read books
  • Reference book purchases
  • Courses on tape queue (on cassette tape or CD for listening in the car)
    • Classics of American Literature, Parts I-VII, by Arnold Weinstein
  • Planning to buy (courses on cassette or CD for the car)
    • none at this time
  • Recent courses on tape
• Major programs that I’ve authored or worked on
  • Pixie, predecessor Moxie, and successor Mixie, and associated tools pixstats, moxstats, and mixstats
  • MIPS u-code compiler procedure integrater
  • MIPS u-code compiler code generator (co-author John Ho)
  • Pastel — an off-color language and Pascal compiler (primary author Jeff Broughton)
  • Amber — an operating system for the LLNL S1 project (many authors)
  • Praxis — language definition and implementation (with Bob Morgan and Art Evans)
  • BBN Satellite IMP (minor role)
  • ITS Emacs (the original, in TECO) — a 1% contributor (primary author Richard M. Stallman)
  • CRTSTY
  • Trantor — Communications operating system (with Charles Frankston and Eugene Ciccarelli for Steve Orszag)
• Instruction Set Architectures or extensions on which I’ve worked
  • S-2: a RISC-like successor to the LLNL S-1
    (circa 1984-1985)
  • MIPS III: the 64-bit extension of the MIPS II ISA
    (circa 1987-1991)
  • MIPS V: the SIMD media extension
    (circa 1996, primary work done by others)
  • MIPS MDMX: the SIMD DSP/media-processing extension
    (circa 1996, primary work done by others)
  • MIPS16: the LSI Logic compact code ISA
    (circa 1996, primary work done by LSI)
  • Tensilica Xtensa: compact embedded ISA designed for configurability and extensibility
    (circa 1998)
  • Tensilica Vectra I ISA and prototype (configurable SIMD, non-VLIW media/DSP extensions)
  • Tensilica Vectra II ISA (configurable SIMD, VLIW media/DSP extensions)
  • Tensilica Bitstream coprocessor ISA and implementation
  • Tensilica Galois Field coprocessor ISA and implementation
• Processor micro-architectures that I helped to design
  • LLNL S-2 (simple RISC-like pipelined ECL processor)
  • MIPS R3000 (cache improvements of the R2000)
  • MIPS R4000 (superscalar)
  • QED R4600/R4700 (low-cost, low-power)
  • Tensilica Xtensa (configurability, extensibility)
• My old email addresses
  • MIT
    • EAK@ML (also EAK@MIT-ML, EAK@MIT-ML.ARPA)
    • EAK@AI (also EAK@MIT-AI, EAK@MIT-AI.ARPA)
    • EAK@MC (also EAK@MIT-MC, EAK@MIT-MC.ARPA)
    • and probably EKillian@MIT-Multics
  • BBN: EKILLIAN@BBN-TENEXE (or EKILLIAN@BBNE)
  • LLNL: eak@mordor.s1.gov, eak@s1-c.arpa
  • MIPS: earl@mips.com
  • QED: earl@qedinc.com
  • SGI: earl@sgi.com
  • Tensilica: earl@tensilica.com
• NIC Handles (e.g. whois -h whois.networksolutions.com or www.networksolutions.com/en_US/whois/)
  • EAK
  • EK32
• ARIN Handles (e.g. whois -h whois.arin.net or ws.arin.net/cgi-bin/whois.pl)
  • EAK-ARIN
  • EARLKI
• My U.S. Patents
  1. 5,027,270 — Instruction streaming FPO
  2. 5,398,328 — Software endian switching FPO
  3. 5,420,992 — Address and word ISA extension FPO
  4. 5,479,630 — Hybrid virtual/physical cache FPO
  5. 5,568,630 — Extended word size and address space FPO
  6. 5,572,713 — Reverse Endian FPO
  7. 5,574,877 — TLB with two physical pages per virtual tag FPO
  8. 5,696,958 — Method and apparatus for reducing delays following the execution of a branch instruction in an instruction pipeline FPO
  9. 5,864,703 — Method for providing extended precision in SIMD vector arithmetic operations FPO
  10. 5,933,650 — Alignment and ordering of vector elements for single instruction multiple data processing FPO
  11. 6,092,187 — Instruction prediction based on filtering FPO
  12. 6,266,758 — Alignment and ordering of vector elements for single instruction multiple data processing FPO
  13. 6,282,633 — High data density RISC processor FPO
  14. 6,425,076 — Instruction prediction based on filtering FPO
  15. 6,477,683 — Automated processor generation system for designing a configurable processor and method for the same FPO
  16. 6,477,697 — Adding complex instructions extensions to a microprocessor FPO
  17. 6,760,888 — Automated processor generation system for designing a configurable processor and method for the same FPO
  18. 6,854,046 — Configurable memory management unit FPO
  19. 7,020,854 — Automated processor generation system for designing a configurable processor and method for the same FPO
  20. 7,036,106 — Automated processor generation system for designing a configurable processor and method for the same FPO
  21. 7,159,100 — Method for providing extended precision in SIMD vector arithmetic operations FPO
  22. 7,197,625 — Alignment and ordering of vector elements for single instruction multiple data processing FPO
  23. 7,219,212 — Load/store operation of memory misaligned vector data using alignment register storing realigned data portion for combining with remaining portion FPO
  24. 7,346,881 — Method and apparatus for adding advanced instructions in an extensible processor architecture FPO
  25. 7,376,812 — Full-Text Vector co-processor for configurable and extensible processor architecture FPO
  26. 7,437,700 — Automated Processor Generation System and Method for Designing a Configurable Processor Delphion
• Programming languages that I contributed to in design discussions
  • Common Lisp
  • Praxis
  • TIE
• Network protocols that I helped define long long ago
  • RFC742 — NAME/FINGER
    Updates
    • RFC1194 — The Finger User Information Protocol
    • RFC1196 — The Finger User Information Protocol
    • RFC1288 — The Finger User Information Protocol
  • RFC788 — Simple Mail Transfer Protocol
    Updates
    • RFC821 — Simple Mail Transfer Protocol
  • RFC733 — Standard for the Format of ARPA Network Text Messages(1)
    Updates
    • RFC822 — Standard for the format of ARPA Internet text messages
  • RFC779 — Telnet Send Location
  • RFC829 — PACKET SATELLITE TECHNOLOGY REFERENCE SOURCES

Sub-content: 2017-07-19 03:18:27

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